Company Description

Apex Compute is at the forefront of revolutionizing AI compute. Our mission is to redefine AI compute architecture by designing efficient, innovative, and cutting-edge hardware and software solutions. We are a passionate team of engineers pushing the boundaries of what's possible in AI hardware, and we offer company stock options to ensure our team shares in our long-term success.

Role Description

We are seeking a highly motivated Hardware Design Engineer (Floating-Point Architecture) to join our team on a full-time basis. This role is based in Los Altos, CA. As a Hardware Design Engineer, you will play a key role in designing arithmetic units and numerical compute pipelines for our next-generation AI compute hardware. You will work closely with architecture, compiler, and systems teams to implement highly efficient arithmetic datapaths optimized for modern AI workloads. This includes designing and optimizing floating-point and low-precision arithmetic units supporting formats such as BF16, FP32, FP8, FP4, and INT4, along with specialized hardware for block quantization and efficient numerical processing.

Responsibilities

• Arithmetic Unit Design:
  • Design and implement high-performance arithmetic units including adders, multipliers, fused datapaths, and reduction pipelines.
  • Develop floating-point and low-precision datapaths supporting BF16, FP32, FP8, FP4, and INT4 arithmetic.
• Numerical Hardware Optimization:
  • Design hardware mechanisms for block quantization, data scaling/swamping handling, and subnormal number processing.
  • Implement efficient rounding, normalization, and exception handling mechanisms for floating-point pipelines.
• Function Approximation Hardware:
  • Implement LUT-based and polynomial-based function approximations for operations such as exponentials, reciprocals, normalization, and activation functions.
  • Optimize approximation accuracy, latency, and resource utilization.
• Microarchitecture & Integration:
  • Design and optimize arithmetic datapaths for high throughput and efficient hardware utilization.
  • Collaborate with architecture and compiler teams to ensure arithmetic units align with system-level performance goals.
• Verification & Debugging:
  • Develop testbenches and validation infrastructure to verify arithmetic correctness and numerical stability.
  • Work with verification and systems teams to debug and optimize hardware implementations.

Qualifications

• Educational Background:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Hardware Design Expertise:
  • Strong experience designing floating-point and fixed-point arithmetic units.
  • Deep understanding of floating-point formats and numerical behavior including BF16, FP32, FP8, FP4, and INT4.
• Technical Skills:
  • Proficiency in Verilog, SystemVerilog, or VHDL for hardware design.
  • Experience implementing adders, multipliers, reduction trees, and numerical datapaths.
  • Familiarity with LUT-based or polynomial function approximations.
• Analytical & Problem-Solving:
  • Strong understanding of numerical precision, rounding behavior, and subnormal number handling.
  • Ability to analyze and optimize arithmetic pipelines for performance, accuracy, and hardware efficiency.
• Desirable Experience:
  • Experience designing arithmetic units for AI accelerators or high-performance compute architectures.
  • Familiarity with quantization techniques such as block quantization or low-precision training/inference.
  • Experience with hardware/software co-design or performance-critical compute systems.

Why Join Us?