Company Description

Apex Compute is focused on revolutionizing AI compute. Our mission is to redefine AI compute architecture by designing efficient, innovative, and cutting-edge hardware and software solutions. The team consists of engineers dedicated to pushing the boundaries. Our startup also offers company stock options to incentivize and reward employees for their contributions to our success.

Role Description

We are seeking a motivated FPGA Design Engineer to join our team. This hybrid role is based in Mountain View, CA, with some flexibility for remote work. As an intern, you will play a critical role in the development of AI compute hardware and the synthesis of efficient, custom hardware tailored to specific compute challenges. You will collaborate with our team of engineers to explore and implement innovative FPGA-based solutions.

Responsibilities

• Hands-on development with Xilinx FPGAs and tools such as Vivado and Vitis.
• Design and implement AXI Master/Slave interfaces and DMA operations.
• Work on AXI interconnect and QOS bus traffic monitoring for optimized hardware performance.
• Develop and verify designs using Verilog, VHDL, and SystemVerilog.
• Implement vector and matrix operations, reduction algorithms, and matrix tiling techniques.
• Contribute to the optimization of hardware for AI workloads through efficient architectural decisions.
• Collaborate with the team to improve hardware performance and scalability.
• Monitor and analyze hardware traffic for optimization.

Qualifications

• Experience with FPGA development, particularly with Xilinx devices.
• Proficiency in Vivado/Vitis tools and workflows.
• Strong skills in Verilog, VHDL, and SystemVerilog.
• Understanding of AXI interconnect, QOS traffic monitoring, and DMA operations.
• Familiarity with vector and matrix operations, reduction techniques, and matrix tiling.